Okay, so here is a rough roadmap of the upcoming events. Milestones are a group of roadmap items that fit together. Once a milestone is completed, testing must occur to ensure that no bugs remain for the next milestone.
Milestone 1 : Booting in a Bochs
- Start up an ELFx86 executable (the “boostrap kernel”) in bochs using GRUB – DONE
- Prepare a pack of useful data for the 64 bit kernel. – DONE
- Prepare 64-bit kernel startup (stack setup, C++ handling, header parsing…) – DONE
- Boot the 64-bit kernel. – DONE
Milestone 2 : Debug mode ON
- Be able to erase contents of the screen. – DONE
- Provide a way to text displaying in a cout-like fashion. Allow color and absolute/relative cursor positioning. – DONE
- Get full support for Bochs debugger – DONE
Milestone 3 : Interruptions and exceptions management
- Get support for legacy interruptions and exceptions (keyboard, stack overflow, general protection fault, and the like). Allow specifying of an arbitrary handler for them.
- Make keyboard-related debugging methods : cin-like functions plus ability to wait for the user to press a key before doing something.
- Test legacy clock and buzzer handling (later, we’ll use the legacy timer in order to measure the timing interval of the APIC timer, and afterwards only use the APIC timer. If someone knows about an easier and standard way to know APIC timer frequency, please let me know)
- Get support for “exotic” interrupts : APIC, IO-APIC, et friends (this noticeably allows processor P-state management, for power saving)
Milestone 3bis : Physical memory management
- Enable paging with 4KB/4MB pages. Set up identity mapping (have paging managed as if it wasn’t enabled, with page A = memory region A). – DONE
- Use bootstrap information to tell which pages are initially free and which pages are initially reserved/busy. Keep some space to tell which process uses these pages. – DONE
- Create a page allocation and liberation mechanism. Introduce a way to be granted access to a specific page, and to allow sharing when such a behavior is wanted. – DONE
- Make said mechanism safe : manage memory outage events and make required parts of allocation functions atomic. – WIP (requires system error management)
- Create a memory chunk allocation and liberation mechanism based on the preceding mechanism. Allow allocation of memory chunks on a sub-page scale (e.g. allocation of integer data) – DONE
- Introduce more advanced memory management : Copy-on-Write and full page flags management.
- Avoid memory leaks. – DONE
Milestone 4 : Processor state and multiple processors
- Prepare thread support : allow processor state saving and task switching.
- Manage multiple cores, aka “application processors” : wake them up, give them a TSS and something to do, globally get full AP management using AMD/Intel manuals – WIP
- Introduire synchronization primitives and atomic operations through mutexes, semaphores, and barriers. – WIP (current mutexes and semaphores are not safe for untrusted processes, they’re only good for kernel-level code)
- Make all operations which need it atomic, including debug routines. – WIP
Once we get there, we fully master the CPUs and the main memory of the computer (except for media instructions like SSE and the like, which will be introduced when the OS is more complete). It’s now time to introduce the process and thread concepts, and to move everything in the OS to processes and threads according to the previous plan. But before we do that, a full review of the OS is needed. Code has to be cleaned, extensively tested, and debugged. Once this is done, we may write the following part of our roadmap.